the Technology Interface/Winter 98
VHDL Sample Routines
from the Technology Interface

VHDL Samples Routines:

Inverter 2-in NAND gate
2-in AND gate 2-in XOR gate
8 Input NAND gate 4-bit maganitude comparator
4-bit multiplexer BCD to 7-segment display driver
Postive edge D-type flip-flop Negative edge D-type flip-flop
A 0110 sequence detector VHDL Programming using Altera